1. Field of the Invention
The present invention relates to a deposition method and a deposition apparatus of fine particles such as nano-particles having diameters less than about 30 to 90 nm, and a forming method and a forming apparatus of carbon nanotubes by using the fine particles as catalysts.
Furthermore, the present invention relates to semiconductor devices having a channel or wires for which carbon nanotubes are used and manufacturing methods of the same, and more particularly, to a semiconductor device having a carbon nanotube which has good controllability of sizes and a manufacturing method of the same.
2. Description of the Related Art
Attempts have been made to manufacture a thin film or a semiconductor device by piling fine particles, particularly nano-particles, on a substrate, which has a different property from a conventional thin film or device. For example, attempts have been made to deposit silicon particles on a gate insulating film of a MOS transistor so that a floating gate has a low leakage. Several methods for depositing these particles exists. For example, there is a method whereby gas (aerosol) including particles (aerosol) is sprayed so that the particles are deposited on the substrate by diffusion or inertia. There also is a method whereby particles are deposited in a temperature gradient by thermophoresis. There also is a method whereby particles are charged in advance and then deposited by using an electrical field, or the like.
Nano-particles can be used as catalysts for formation of carbon nanotubes, which are self-organizing materials. Lately, attempts are being made to apply the carbon nanotubes to various fields because of good electrical, thermal and mechanical properties. Since characteristics of the carbon nanotubes vary in terms of their diameters, chiralities, the number of layers, or the like, it is important to control these characteristics for various applications.
Recent reports indicate that the diameters of the carbon nanotubes are controlled by the size of catalyst particles. In particular, particles are generated by a liquid phase process such as a reversed micelle method. This is followed by particle suspension whereby particles are dropped and dried on the substrate, and then CVD. As a result, carbon nanotubes can be grown on the substrate while controlling their diameters. Reports also indicate that carbon nanotubes can be grown after an aqueous solution of ferritins containing iron oxide is provided on a substrate.
The carbon nanotube has a cylinder-shaped configuration wherein a surface piece (graphene sheet) of graphite is wound. The diameter of the carbon nanotube is in a range of approximately 3 to 9 nm to 30 to 90 nm and the length of the carbon nanotube is approximately 3 to 9 μm. Hence, the aspect ratio (length/diameter) is approximately 1000. Therefore, a one-dimensional electronic characteristic due to such configuration anisotrophy is observed.
An example of an electronics application of the carbon nanotube the wiring of an LSI (large scale integrated circuit). The maximum electric current density of the carbon nanotube where an electric current can flow without causing snapping (breaking) is one billion amperes per one square centimeter, which is more than 1000 times as much as copper wiring. In addition, the thermal conductivity is ten times as high as copper.
With respect to the carbon nanotube, ballistic electron transport can be realized without scattering phenomena caused by impurities and lattice vibration. In this case, it is known that the resistance per one carbon nanotube is approximately 6.45 kΩ. Furthermore, the diameter of the carbon nanotube has a wide range of approximately 0.4 nm to 100 nm. The diameter is formed in a self-organized manner, and therefore changes in diameter in a longitudinal direction are extremely small. Because of the above discussed characteristics, the electromigration due to a high electric current density in a case where the carbon nanotube is applied as wiring of the LSI is small. Therefore, it is expected that extremely minute metal wirings having high reliability can be realized.
Another example of an electronics application of the carbon nanotube is to the channel of a transistor. It is expected that, with the carbon nanotube, abilities in driving electric current will be considerably improved because of the ballistic electron transport and an extremely large electric current density the carbon nanotube can sustain.
As briefly mentioned above, general growth methods of carbon nanotubes, such as the arc discharging method, the laser ablation method (laser evaporation method), the CVD method, the SiC sublimation method, or the like, are known. In such methods, at the time when the carbon nanotube is formed, transition metals are used as catalyst metals. In the CVD method or SiC sublimation method, the transition metal is positioned and formed in advance by using lithography and a vacuum evaporation method used for a semiconductor LSI, so that the carbon nanotubes are selectively grown by performing position controlling.
However, the above mentioned conventional methods have the following problems.
First, although the above mentioned art is useful for piling the particles on the plane substrate, it is difficult to deposit the particles on the bottom part of the groove having a high aspect ratio, which is formed on the substrate with a size on the order of a micron or less. More particularly, as shown in FIG. 1, due to diffusion of the particles 301, the particles 301 are unevenly distributed and deposited at an entering part of a groove forming part 302. Because of this, it is difficult to lead the particles 301 to a bottom part 303. This tendency frequently occurs when making the sizes of the particles smaller. For example, this causes a big problem when the catalyst particles are deposited on the bottom part of the via hole in a case where the carbon nanotubes are applied as a via wiring of the semiconductor.
Furthermore, in the above discussed methods for forming carbon nanotubes, the formation of the particles or preparation of a suspension is generally performed outside of a CVD chamber by manual means. Hence, various impurities may get easily mixed in. Furthermore, it is necessary to add a surface active agent in order to keep particles generated in the liquid phase in a stable suspension. In many examples, therefore, impurities are substantially included when the particles are provided on the substrate. In addition, it is difficult to avoid exposing a surface of the particles to the air and such impurities. Hence, it is difficult to generate particles having stable compositions.
The above mentioned impurities on the substrate and unstableness of the composition of the particles may cause problems in growing carbon nanotubes and controlling their diameters. In addition, since the above mentioned process is a process substantially and easily exposed to the air, the surface of the substrate is easily oxidized and electric contact between the carbon nanotube after the growth and the substrate becomes worse. Hence, it is difficult to apply the carbon nanotube to electric applications.
Thus, it is difficult to apply a conventional forming technology of the nano-particles to a process requiring a precise control of the carbon nanotube growth. In addition, there are still a lot of problems in controlling the growth of the carbon nanotubes.
There also is a method in the related art wherein carbon nanotubes are used for connecting wiring layers of an LSI having a multilayer interconnection structure. FIG. 2-(A) shows a multilayer interconnection structure wherein an upper wiring layer 103 is provided over a lower wiring layer 101 via an interlayer insulating layer 102. Carbon nanotubes 105 are formed in a via hole forming part 104 so that the upper wiring layer 103 and the lower wiring layer 101 are electrically connected. Under the above mentioned structure, a catalyst metal layer 106 is formed on a surface of the lower wiring layer 101 of the via hole forming part 104. Carbon nanotubes are formed by using the catalyst metal layer 106 as a nucleus with a thermal CVD method.
However, the LSI has a tendency to become more and more integrated based on the scaling rule, and therefore it is expected that the opening width of a via hole forming part will continue to get narrower and the aspect ratio of the via hole forming part will continue to get larger. Even if it is attempted to form the catalyst metal layer 106 on the bottom of the narrower via hole forming part 104 by the spattering method or vapor deposition method, the catalyst metal layer 106 is adhered on not only the bottom of the via hole forming part 104 but also a side wall, as shown in FIG. 2-(B). As a result of this, a carbon nanotube is grown from the catalyst metal layer 106A adhered on the side wall. This causes a problem in that the upper wiring layer 103 and the lower wiring layer 101 are not electrically connected. On the other hand, there is an electric plating method whereby the catalyst metal layer is formed. However, in this method, as shown in FIG. 2-(C), as the opening part of the via hole forming part 104 is narrower, a film width distribution based on an electric current density distribution caused by added voltage is more remarkable. Therefore, the film of a bottom center part 104A of the via hole forming part 104 becomes thin and a film of a vicinity part 104B becomes thick. This causes an increase in the via resistance of the catalyst metal layer 106B to thickly adhere the catalyst metal to the vicinity part 104B.
Furthermore, the catalyst metal layer formed by the spattering method, vacuum vapor deposition, or electric plating method, is a continuous layer having a small surface roughness. A bundle of the carbon nanotubes grown from such a catalyst metal layer has unevenness of internal diameters and external diameters. As the via hole forming part is narrowed and the number of the carbon nanotubes contributing to electric conductivity is reduced, unevenness of the via resistance becomes larger. As a result, a problem such as wiring delay may occur in a case where the via forming part has a large via resistance. Furthermore, in a case of the LSI having a lot of transistors wherein carbon nanotubes are used as a channel, unevenness of an electric current driving ability between the transistors occurs due to the unevenness of the internal and external diameters of the carbon nanotubes. This causes a problem in that the capabilities of the entire LSI are reduced.